| PART |
Description |
Maker |
| CYW15G0201DXB |
Dual-channel HOTLink Transceiver
|
Cypress Semiconductor
|
| CYV15G0204RB-BGC |
Independent Clock Dual HOTLink II Reclocking Deserializer
|
Cypress Semiconductor
|
| CYP15G0101DXB-BBC CYP15G0101DXB-BBXC CYP15G0101DXB |
Single-channel HOTLink II Transceiver Compliant to multiple standards
|
Cypress Semiconductor
|
| CYP15G0401DXB-BGXI |
Quad HOTLink II (TM) Transceiver; Features: Channel Bonding, 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
|
CYPRESS SEMICONDUCTOR CORP
|
| CY7B9334-270JC CY7B9234-270JC CY7B9234 CY7B9234-40 |
SMPTE HOTLink® Transmitter/Receiver
SMPTE HOTLink™ Transmitter/Receiver
SMPTE HOTLink Transmitter/Receiver
|
CYPRESS[Cypress Semiconductor]
|
| BAV100 BAV101 BAV100_2 BAV103 BAV102 BAV103/T1 BAV |
General purpose diodes 0.25 A, 60 V, SILICON, SIGNAL DIODE
From old datasheet system
Single-channel HOTLink II™ Transceiver
12 Output Buffer for 2 DDR and 3 SRAM DIMMS
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| ELJND102KF ELJND102DF ELJNA221JF ELJFC220DF ELJFC2 |
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 3 V to 5.25 V; Package: QFN;
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 2.4 V to 5.25 V; Package: TQFP;
TAXI(TM) Compatible HOTLink(R) Transceiver; Features: 8-bit 4B/5B or 10-bit 5B/6B,BIST; Frequency Range: 50 to 200 Mbps; Standard: TAXIchip;
EZ-USB HX2LP(TM) Low-Power USB 2.0 Hub Controller Family; Development Kit: CY4606; Hub Ports: 4; USB Application: High Speed Hub;
Independent Clock Quad HOTLink II(TM) Reclocking Deserializer; Features: Quad Channel Deserializer; Package: BGA; Pins/Ball: 256; Standard
Independent Clock HOTLink II(TM) Serializer and Reclocking Deserializer; Features: Single Channel SERDES; Package: BGA; Pins/Ball: 256
EZ-USB AT2LP(TM) USB 2.0 to ATA/ATAPI Bridge; # Endpoints: 7; Core: N/A; Data Transfers: Bulk, Interrupt, Isochronous; Development Kit: CY4615B
Independent Clock HOTLink II(TM) Dual Serializer and Dual Reclocking Deserializer; Features: Dual Channel SERDES; Package: BGA; Pins/Ball: 256; Standard: SMPTE|DVB-ASI
Independent Clock Quad HOTLink II™ Transceiver; Features: Independent Clocking, 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
Single-channel HOTLink II(TM) Transceiver; Features: 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
Dual-channel HOTLink II(TM) Transceiver; Features: Channel Bonding, 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
EZ-Host(TM) Programmable Embedded USB Host and Peripheral Controller with Automotive AEC Grade Support; Memory Architecture: ROM/RAM; Memory Size: 16 KB; Package: TQFP; # Endpoints: 8
EZ-USB SX2(TM) High Speed USB Interface Device; # Endpoints: 7; Core: N/A; Data Transfers: Bulk, Interrupt, Isochronous; Development Kit: CY3683
STAR-250/CYIS1SM0250AA; Application: Satellite Optical Altitude, Comm Sensors, Spacecraft Visual Monitors, Nuclear; Features: Rolling Shutter, Windowing, On-Chip FPN Correction, Double Slope; Frame Rate: 29 fps; Optical Format: 1 inch
Programmable System on a Chip; Voltage: 4.75V - 5.25V; GPIO: 24; Analog Blocks: 12; Digital Blocks: 16; Flash: 32KB; RAM: 2KB; Temp: E; Comm: I2C, SPI, UART; Package: 28 SSOP
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 2.4 V to 5.25 V; Package: TQFP; 片式电感
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 3 V to 5.25 V; Package: QFN; 片式电感
Chip inductors 片式电感
64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs; Density: 64 Kb; Organization: 4Kb x 18; VCC(V): 3.0 to 3.6 V; Speed: 40 MHz 片式电感
Independent Clock Quad HOTLink II(TM) Reclocking Deserializer; Features: Quad Channel Deserializer; Package: BGA; Pins/Ball: 256; Standard: SMPTE|DVB-ASI 片式电感
EZ-USB AT2LP(TM) USB 2.0 to ATA/ATAPI Bridge; # Endpoints: 7; Core: N/A; Data Transfers: Bulk, Interrupt, Isochronous; Development Kit: CY4615B 片式电感
enCoRe(TM) USB Combination Low-Speed USB and PS/2 Peripheral Controller; # Endpoints: 3; #of I/O: 10; Core: M8B (8-bit RISC); Development Kit: CY3654, CY3654-P05 1 ELEMENT, 22 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD
Chip inductors 1 ELEMENT, 0.22 uH, NON-MAGNETIC-CORE, GENERAL PURPOSE INDUCTOR, SMD
1.3 MPxl Rolling Shutter CMOS Image Sensor; Application: Machine Vision, Instrumentation, Microscopy; Features: Rolling Shutter, Windowing, On-Chip FPN Correction, Double Slope; Frame Rate: 7 fps; Optical Format: 2/3 inch
|
Panasonic Corporation
Panasonic, Corp.
|
| M74HC352B1R M74HC353M1R M54HC352 M54HC352B1R M54HC |
HC353: DUAL 4 CHANNEL MULTIPLEXER 3 STATE OUTPUT(INV.) HC352: DUAL 4 CHANNEL MULTIPLEXER(INV.)
HC353: DUAL 4 CHANNEL MULTIPLEXER 3 STATEOUTPUTINV. HC352: DUAL 4 CHANNEL MULTIPLEXERINV.
12-Bit, 2.5 us Dual DAC, Serial Input, Programmable Settling Time, M temperature 8-CDIP -55 to 125
VDSL Codec 80-LQFP -40 to 85
12-Bit, Single Channel DAC, Parallel, Voltage Out, Low Power, Asynchronous Update 20-SOIC 0 to 70
|
SGS Thomson Microelectronics
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
意法半导
|
| CYV15G0104TRB CYV15G0104TRB-BGC CYV15G0104TRB-BGXC |
Independent Clock HOTLink II垄芒 Serializer and Reclocking Deserializer
Independent Clock HOTLink II?/a> Serializer and Reclocking Deserializer
Independent Clock HOTLink II Serializer and Reclocking Deserializer
|
Cypress Semiconductor
http://
|
| FDD8426H |
40V Dual N & P-Channel PowerTrenchMOSFET
Dual N & P-Channel PowerTrench垄莽 MOSFET N-Channel: 40 V, 12 A, 12 m楼? P-Channel: -40 V, -10 A, 17 m楼?
Dual N & P-Channel PowerTrench? MOSFET N-Channel: 40 V, 12 A, 12 mΩ P-Channel: -40 V, -10 A, 17 mΩ
|
Fairchild Semiconductor
|
| CYP15G0401DXB-BGC |
Quad HOTLink II Transceiver
|
CYPRESS
|
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